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-- On Sat, Jul 16, 2011 at 11:28 AM, Stylowinkie <mc090406505@vu.edu.pk> wrote:
This is my cs501 Advance computer architecture paper
Q1 ( Marks: 5 )
Consider a 4 way set-associative cache with 256KB capacity and 32 byte lines
a) How many sets are there in the cache?
b) How many bits of address are required to select a set in cache?
Q2 convert the hexadecimal number B316 to base 10 5MarksQ3 what do you know about " booth pair recording 3marks
Q.4 assembler symbol table note.3-marks:
Q.5 configuration of 1x8 memory cell .3marks
Q.6 Single detached DMA 5marks
Q.7 what is hardisk 2 marks
Q.8 difference bw connection oriented and connection less
Q.9 pipeline disadvantage 3 marks
Regards
Bilal Farooq | Final Semester
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